October 2024
Our information processing machines are constrained by energy. We simply cannot continue this exponential growth in the use of information, if we cannot reduce the energy required to handle each bit.
In order to build low energy interconnects that are significantly better than the status quo, we'll need to bring device energy usage down into the atto-joule regime.
Doing this with optics, we unavoidably come up against the fundamental cost of emitting a photon from an atom. But we don't always need to create a photon to carry our bits. There are designs for interconnects that can use external light sources, and communicate on chip with electroabsorptive modulators.
Most of the energy usage then is dominated by capacitive energies required to swing the voltage across such a modulating device. This device ought only cost a few atto-joules, if we can constrain the device volume greatly:
e.g. at (100nm)³ → capacitance of 100aF → by CV², charging or discharging a nano scale device by 1 V requires → ~100 aJ of energy.
As the operation of light modulating devices is based on transition rates that are proportional to the EM energy density, we can reduce device volume while operating effectively if we can significantly concentrate optical fields. Work on resonators, plasmonics and slow light is relevant here.
A low power modulator was already demonstrated here in 2014: Nature Communications
Already without significant materials advances we can envision reaching a milestone of ~10 fJ/bit towards the end of this decade. This system would correspond to 10 mW of total dissipation for each Tb/s of communication inside a system up to 10m in size. That energy per bit is 2 to 3 orders of magnitude lower than current approaches at these length scales, ranging from chip-to-chip to longer connections.
This will be made possible with atto-joule output devices, low energy receivers, as well as exploitation of optics for clocking and time multiplexing (thereby eliminating electrical circuits for line coding, CDR and SERDES).
Todo list:
I don't yet have a forecast for each step, but I am optimistic that we are seeing something like a Moore's law for light on chip this decade.
Update from 2025:
Not directly on this agenda, but Neurophos has proposed an OPU to do vec-mat multiplies efficiently. Each modulator they talk about is a unit cell scatterer of their metasurface. The comparison to GPU flops is misleading but it is an interesting attempt. They can achieve a 1000x1000 matrix tile. Cross talk and diffraction of the signal will be key technical issues to solve. If that is sorted, scalable packaging and assembly of their films & cylindrical lenses would dominate the production cost. Nonetheless I am excited for all the efforts towards hybrid analog-digital accelerators, and hope they figure something out.